In the recent semiconductor processing technology, a challenge to higher integration of large-scale integrated circuits places an increasing demand for miniaturization of circuit patterns. There are increasing demands for further reduction in size of circuit-constructing wiring patterns and for miniaturization of contact hole patterns for cell-constructing inter-layer connections. As a consequence, in the manufacture of circuit pattern-written photomasks for use in the photolithography of forming such wiring patterns and contact hole patterns, a technique capable of accurately writing finer circuit patterns is needed to meet the miniaturization demand.
In order to form a higher accuracy photomask pattern on a photomask substrate, it is of first priority to form a high accuracy resist pattern on a photomask blank. Since the photolithography carries out reduction projection in actually processing semiconductor substrates, the photomask pattern has a size of about 4 times the actually necessary pattern size, but an accuracy which is not loosened accordingly. The photomask serving as an original is rather required to have an accuracy which is higher than the pattern accuracy following exposure.
Further, in the currently prevailing lithography, a circuit pattern to be written has a size far smaller than the wavelength of light used. If a photomask pattern which is a mere 4-time magnification of the circuit feature is used, a shape corresponding to the photomask pattern is not transferred to the resist film due to influences such as optical interference occurring in the actual photolithography operation. To mitigate these influences, in some cases, the photomask pattern must be designed to a shape which is more complex than the actual circuit pattern, i.e., a shape to which the so-called optical proximity correction (OPC) is applied. Then, at the present, the lithography technology for obtaining photomask patterns also requires a higher accuracy processing method. The lithographic performance is sometimes represented by a maximum resolution. As to the resolution limit, the lithography involved in the photomask processing step is required to have a maximum resolution accuracy which is equal to or greater than the resolution limit necessary for the photolithography used in a semiconductor processing step using a photomask.
A photomask pattern is generally formed by forming a photoresist film on a photomask blank having a light-shielding film on a transparent substrate, writing a pattern using electron beam, and developing to form a resist pattern. Using the resulting resist pattern as an etch mask, the light-shielding film is etched into a light-shield pattern. In an attempt to miniaturize the light-shield pattern, if processing is carried out while maintaining the thickness of the resist film at the same level as in the art prior to the miniaturization, the ratio of film thickness to pattern width, known as aspect ratio, becomes higher. As a result, the resist pattern profile is degraded, preventing effective pattern transfer, and in some cases, there occurs resist pattern collapse or stripping. Therefore, the miniaturization must entail a thickness reduction of resist film.
As to the light-shielding film material, chromium base materials were used in the prior art. It is described in Patent Document 1 that silicon base materials such as materials containing silicon or materials containing silicon and a transition metal have good light-shielding properties to exposure light with a wavelength up to 200 nm, are susceptible to fluorine dry etching which will cause minimal damage to the resist pattern, and can thus be processed at a higher accuracy. Higher accuracy processing becomes possible when these materials are combined with the etching technique using a hard mask of chromium base material (see Patent Document 2). Thus, films formed of silicon base materials are considered promising as the light-shielding film of the next generation.